PIC18F4610T-I/ML【PDF 181/234 页】IC MCU FLASH 32KX16 44QFN

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Sheet目录3878

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PIC18F2X1X/4X1X

DS39636D-page 52

2009 Microchip Technology Inc.

FSR1H

2410 2510 2515 2610 4410 4510 4515 4610

---- 0000

---- uuuu

FSR1L

2410 2510 2515 2610 4410 4510 4515 4610

xxxx xxxx

uuuu uuuu

BSR

2410 2510 2515 2610 4410 4510 4515 4610

---- 0000

---- uuuu

INDF2

2410 2510 2515 2610 4410 4510 4515 4610

N/A

POSTINC2

2410 2510 2515 2610 4410 4510 4515 4610

N/A

POSTDEC2

2410 2510 2515 2610 4410 4510 4515 4610

N/A

PREINC2

2410 2510 2515 2610 4410 4510 4515 4610

N/A

PLUSW2

2410 2510 2515 2610 4410 4510 4515 4610

N/A

FSR2H

2410 2510 2515 2610 4410 4510 4515 4610

---- 0000

---- uuuu

FSR2L

2410 2510 2515 2610 4410 4510 4515 4610

xxxx xxxx

uuuu uuuu

STATUS

2410 2510 2515 2610 4410 4510 4515 4610

---x xxxx

---u uuuu

TMR0H

2410 2510 2515 2610 4410 4510 4515 4610

0000 0000

uuuu uuuu

TMR0L

2410 2510 2515 2610 4410 4510 4515 4610

xxxx xxxx

uuuu uuuu

T0CON

2410 2510 2515 2610 4410 4510 4515 4610

1111 1111

uuuu uuuu

OSCCON

2410 2510 2515 2610 4410 4510 4515 4610

0100 q000

uuuu uuqu

HLVDCON

2410 2510 2515 2610 4410 4510 4515 4610

0-00 0101

u-uu uuuu

WDTCON

2410 2510 2515 2610 4410 4510 4515 4610

---- ---0

---- ---u

RCON(4)

2410 2510 2515 2610 4410 4510 4515 4610

0q-1 11q0

0q-q qquu

uq-u qquu

TMR1H

2410 2510 2515 2610 4410 4510 4515 4610

xxxx xxxx

uuuu uuuu

TMR1L

2410 2510 2515 2610 4410 4510 4515 4610

xxxx xxxx

uuuu uuuu

T1CON

2410 2510 2515 2610 4410 4510 4515 4610

0000 0000

u0uu uuuu

uuuu uuuu

TMR2

2410 2510 2515 2610 4410 4510 4515 4610

0000 0000

uuuu uuuu

PR2

2410 2510 2515 2610 4410 4510 4515 4610

1111 1111

T2CON

2410 2510 2515 2610 4410 4510 4515 4610

-000 0000

-uuu uuuu

SSPBUF

2410 2510 2515 2610 4410 4510 4515 4610

xxxx xxxx

uuuu uuuu

SSPADD

2410 2510 2515 2610 4410 4510 4515 4610

0000 0000

uuuu uuuu

SSPSTAT

2410 2510 2515 2610 4410 4510 4515 4610

0000 0000

uuuu uuuu

SSPCON1

2410 2510 2515 2610 4410 4510 4515 4610

0000 0000

uuuu uuuu

SSPCON2

2410 2510 2515 2610 4410 4510 4515 4610

0000 0000

uuuu uuuu

TABLE 4-4:

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Register

Applicable Devices

Power-on Reset,

Brown-out

Reset

MCLR Resets,

WDT Reset,

RESET

Instruction,

Stack Resets

Wake-up via

WDT

or Interrupt

Legend:

u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1:

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector

(0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with

the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.

See Table 4-3 for Reset value for specific condition.

Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as

PORTA pins, they are disabled and read ‘0’.

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